1. Field of the Invention
The present invention relates generally to electronic device testing, and more particularly, to bit synchronization techniques used in testing integrated circuit (IC) devices that output high-speed serial data streams.
2. Description of the Related Art
Next generation ICs will use a large number of high-speed serial links to communicate with external memory and I/O devices. In order to obtain accurate test results of such devices, it is important that a continuous stream of bits (0's and 1's) outputted by them is consistently strobed near the center of the bit and away from the transitions between the bits. If the strobes are positioned near the bit transitions, inaccurate strobe readings (e.g., 0 strobed as a 1, or 1 strobed as a 0) might result and cause inaccurate test results.
A conventional automated test equipment (ATE) uses a binary search method to locate the center of the bit. The binary search method is carried out during the initialization phase of testing when the device under test is outputting a bit stream of alternating 0's and 1's. With this method, two strobe points separated by one bit interval are initially selected. Then, a third strobe point that is halfway between the initial two strobe points is selected. The reading from the third strobe point is compared with the readings from the first two, and the pair that exhibits a transition (0 to 1 or 1 to 0) is selected as end points of a fourth strobe point that is halfway between the pair. The reading from the fourth strobe point is compared with the readings from the end points, and the pair that exhibits a transition (0 to 1 or 1 to 0) is selected as end points of a fifth strobe point that is halfway between the pair. This process is repeated until the bit transition is identified with a predetermined degree of accuracy. The bit strobe position is then computed as the position of the bit transition plus one-half of the bit interval.
The binary search method as described above is too slow and cannot be used while a test is ongoing. As a result, it is unable to correct for bit misalignments that may result during testing, e.g., during clock starts and stops, and from drifts caused by heating up or cooling down of the device.
U.S. patent application Ser. No. 10/948,709, filed Sep. 23, 2004, entitled “Bit Synchronization for High-Speed Serial Device Testing,” discloses another method to locate the center of a bit. In this method, a number of different time sets that define different strobe positions along a bit interval are used. The strobe readings generated with the different time sets are evaluated and one of the time sets is selected as the one to be used during testing.
While the method described in U.S. patent application Ser. No. 10/948,709 is faster than the binary search method and permits strobe position adjustments during testing, it requires multiple time sets to be stored in memory during the entire test. This is not desirable, because memory space is not efficiently utilized, especially during the test when memory resources can be scarce.